A Low-Gm Programmable Transconductor Based on FVF Architecture in 180 nm CMOS Process
DOI:
https://doi.org/10.66326/vfr88e53Keywords:
A Low-Gm Programmable Transconductor Based on FVF Architecture in 180 nm CMOS ProcessAbstract
This paper presents the design and simulation of a programmable low-transconductance (Gm) operational transconductance amplifier (OTA) suitable for integrated analog filters. The proposed architecture is based on a Flipped Voltage Follower (FVF) core with a source degeneration path implemented using a voltage-controlled MOS pseudo-resistor. This configuration enables wide tunability of the transconductance while maintaining low power consumption and compact area. Designed in a 0.18 μm CMOS process and operating at a 1.8 V supply, the OTA achieves a tunable Gm range from 3.25 nS to 25 nS with a power consumption of only 9 μW. The circuit exhibits a bandwidth of 560 kHz and a total harmonic distortion
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